AX301-AX4010-SCH

11223344DDCCBBAA1*****7AX301:07:55Y:\project\AX\AX4010\AX301_CD_A\01_硬件设计资料\原理图和PCB\1_POWER.SchDocTitleSize:Number:Date:File:Revision:SheetofTime:A4R11K电源指示灯D3V3LED6D3V3SW1SWVCC12P412P112P2VCCD3V3D1V2F1Fuse123456U2SRV05-4VBUSDPDMRXDTXDLED7RXDLED8TXDR41KR71KD3V3VBUS1D-2D+3ID4GND5J6USB转串口USB接口+EC4100uF/16VGND1OUT2IN3=4U51117-1.2D1V2D3V3+EC5100uF/16VGND1OUT2IN3=4U11117-3.3D3V3VCC+EC2100uF/16V三路电源C11uFR210kC210uFDCD1RI2GND3D+4D-5VDD6REGIN7VBUS8RST9NC10SUSPEND11SUSPEND12NC13CTS23RTS24RXD25TXD26DSR27DTR28NC14NC15NC16NC17NC18NC19NC20NC21NC22U4CP2102VCCDPDMRXDTXDC45104C49104C48104C44104+EC6100uF/16VVBUSGND1OUT2IN3=4U61117-2.5D2V5VCC+EC3100uF/16VC21104C4104+EC1100uF/16V12P3D2V511223344DDCCBBAA2*****7AX301:08:19Y:\project\AX\AX4010\AX301_CD_A\01_硬件设计资料\原理图和PCB\2_FPGA.SchDocTitleSize:Number:Date:File:Revision:SheetofTime:OrcadABANK1IOD4IOE5IOF5IO,(DQS2L/CQ3L)/(DQS2L/CQ3L)B1IO,DIFFIO_L1pC2IO,DIFFIO_L1n,(DATA1,ASDO)C1IO,VREFB1N0F3IO,DIFFIO_L2p,(FLASH_nCE,nCSO)D2IO,DIFFIO_L2nD1IOG5IO,DIFFIO_L3pF2IO,DIFFIO_L3nF1IO,DIFFIO_L4p,(DQS0L/CQ1L,DPCLK0)/(DQS0L/CQ1L,DPCLK0)G2IO,DIFFIO_L4nG1IO,(DATA0)H2U3AEP4CE6F17C8BANK2IO,DIFFIO_L5p,(DQ1L)/(_)J2IO,DIFFIO_L5n,(DQ1L)/(_)J1IOJ6IO,DIFFIO_L6pK6IO,DIFFIO_L6nL6IO,DIFFIO_L7pK2IO,DIFFIO_L7n,(DQ1L)/(_)K1IO,DIFFIO_L8p,(DQS1L/CQ1L#,DPCLK1)/(DQS1L/CQ1L#,DPCLK1)L2IO,DIFFIO_L8n,(DQ1L)/(_)L1IO,VREFB2N0L3IO,DIFFIO_L9p,(DQ1L)/(_)N2IO,DIFFIO_L9n,(DQ1L)/(_)N1IO,RUP1,(DQ1L)/(_)K5IO,RDN1,(DQ1L)/(_)L4IO,(DQS3L/CQ3L#)/(DQS3L/CQ3L#)R1IO,DIFFIO_L10p,(DQ1L)/(_)P2IO,DIFFIO_L10n,(DM1L/BWS#1L)/(_)P1U3BEP4CE6F17C8BANK3IO,DIFFIO_B1pN3IO,DIFFIO_B1n,(DM3B/BWS#3B)/(DM5B/BWS#5B)P3IO,DIFFIO_B2p,(DQ3B)/(DQ5B)R3IO,DIFFIO_B2nT3IO,(DQS1B/CQ1B#,DPCLK2)/(DQS1B/CQ1B#,DPCLK2)T2IO,PLL1_CLKOUTpR4IO,PLL1_CLKOUTnT4IO,DIFFIO_B4p,(DQ3B)/(DQ5B)N5IO,DIFFIO_B4n,(DQ3B)/(DQ5B)N6IO,(DQ3B)/(DQ5B)M6IO,VREFB3N0P6IO,DIFFIO_B5p,(DQS3B/CQ3B#)/(DQS3B/CQ3B#)M7IO,DIFFIO_B5nK8IO,DIFFIO_B6p,(DQ3B)/(DQ5B)R5IO,DIFFIO_B6nT5IO,DIFFIO_B7p,(DQ3B)/(DQ5B)R6IO,DIFFIO_B7nT6IO,(DQ3B)/(DQ5B)L7IO,DIFFIO_B8p,(DQ3B)/(DQ5B)R7IO,DIFFIO_B8n,(DQS5B/CQ5B#)/(DQS5B/CQ5B#)T7IO,DIFFIO_B9p,(DQ3B)/(DQ5B)L8IO,DIFFIO_B9n,(DM5B/BWS#5B)/(DM5B/BWS#5B)M8IO,DIFFIO_B10p,(DQ5B)/(DQ5B)N8IO,DIFFIO_B10n,(DQ5B)/(DQ5B)P8IO,DIFFIO_B11pR8IO,DIFFIO_B11nT8U3CEP4CE6F17C8BANK4IO,DIFFIO_B12pR9IO,DIFFIO_B12nT9IO,DIFFIO_B13pK9IO,DIFFIO_B13nL9IO,DIFFIO_B14pM9IO,DIFFIO_B14n,(DQ5B)/(DQ5B)N9IO,DIFFIO_B15p,(DQ5B)/(DQ5B)R10IO,DIFFIO_B15n,(DQS4B/CQ5B)/(DQS4B/CQ5B)T10IO,DIFFIO_B16p,(DQ5B)/(DQ5B)R11IO,DIFFIO_B16nT11IO,DIFFIO_B17p,(DQ5B)/(DQ5B)R12IO,DIFFIO_B17n,(DQ5B)/(DQ5B)T12IO,DIFFIO_B18pK10IO,DIFFIO_B18nL10IO,(DQS2B/CQ3B)/(DQS2B/CQ3B)P9IO,VREFB4N0P11IO,DIFFIO_B19pR13IO,DIFFIO_B19n,(DQ5B)/(DQ5B)T13IO,RUP2M10IO,RDN2N11IO,DIFFIO_B20p,(DQ5B)/(DQ5B)T14IO,DIFFIO_B20n,(DQS0B/CQ1B,DPCLK3)/(DQS0B/CQ1B,DPCLK3)T15IOR14IO,DIFFIO_B21pP14IO,DIFFIO_B21nL11IO,DIFFIO_B22pM11IO,DIFFIO_B22nN12U3DEP4CE6F17C8DATA0nCSOASDOS_NCSS_DB0S_DB6DIG0DIG3DIG5RTC_NRSTRTC_DATARTC_SCLKP8N6M7N5M6VGA_HSYNCVGA_VSYNCVGA_VSYNCVGAD1VGAD3VGAD5VGAD6VGAD8VGAD9VGAD10VGAD11VGAD12VGAD13VGAD14VGAD15J1J2K1K2L1L2TXDN2R1P1P2R9R10R11R12R13T9T10T11T12T13T14K9L9L10M9B1G1G2F1F2SCLC2F3P3T2T3T4T5T6T7T8R3R4R5R6R7R8SEL0SEL1SEL2SEL3SEL4SEL52911223344DDCCBBAA3*****7AX301:08:36Y:\project\AX\AX4010\AX301_CD_A\01_硬件设计资料\原理图和PCB\3_FPGA.SchDocTitleSize:Number:Date:File:Revision:SheetofTime:OrcadABANK5ION13IOM12IOL12IOK12IO,RUP3,(DM1R/BWS#1R)/(_)N14IO,RDN3,(DQ1R)/(_)P15IO,DIFFIO_R11n,(DQS3R/CQ3R#)/(DQS3R/CQ3R#)P16IO,DIFFIO_R11p,(DQ1R)/(_)R16IOK11IO,DIFFIO_R10n,(DQ1R)/(_)N16IO,DIFFIO_R10p,(DQ1R)/(_)N15IO,VREFB5N0L14IO,(DQ1R)/(_)L13IO,DIFFIO_R9n,(DQ1R)/(_)L16IO,DIFFIO_R9pL15IOJ11IO,DIFFIO_R8n,(DQ1R)/(_)K16IO,DIFFIO_R8p,(DQS1R/CQ1R#,DPCLK4)/(DQS1R/CQ1R#,DPCLK4)K15IO,DIFFIO_R7n,(DEV_OE)J16IO,DIFFIO_R7p,(DEV_CLRn)J15IO,DIFFIO_R6n,(DQ1R)/(_)J14IO,DIFFIO_R6pJ12IO,(DQ1R)/(_)J13U3EEP4CE6F17C8BANK6IO,DIFFIO_R4n,(INIT_DONE)G16IO,DIFFIO_R4p,(CRC_ERROR)G15IOF13IO,DIFFIO_R3n,(nCEO)F16IO,DIFFIO_R3p,(CLKUSR)F15IO,(DQS0R/CQ1R,DPCLK5)/(DQS0R/CQ1R,DPCLK5)B16IO,VREFB6N0F14IO,DIFFIO_R2nD16IO,DIFFIO_R2pD15IOG11IO,DIFFIO_R1n,(DQS2R/CQ3R)/(DQS2R/CQ3R)C16IO,DIFFIO_R1pC15U3FEP4CE6F17C8BANK7IO,DIFFIO_T21nC14IO,DIFFIO_T21p,(DQ5T)/(DQ5T)D14IO,DIFFIO_T20nD11IO,DIFFIO_T20p,(DQS0T/CQ1T,DPCLK6)/(DQS0T/CQ1T,DPCLK6)D12IO,DIFFIO_T19nA13IO,DIFFIO_T19p,(DQ5T)/(DQ5T)B13IO,PLL2_CLKOUTnA14IO,PLL2_CLKOUTpB14IO,RUP4E11IO,RDN4E10IO,DIFFIO_T18n,(DQ5T)/(DQ5T)A12IO,DIFFIO_T18p,(DQ5T)/(DQ5T)B12IO,DIFFIO_T17n,(DQ5T)/(DQ5T)A11IO,DIFFIO_T17p,(DQ5T)/(DQ5T)B11IO,VREFB7N0C11IO,DIFFIO_T16nF10IO,DIFFIO_T16p,(DQS2T/CQ3T)/(DQS2T/CQ3T)F9IO,DIFFIO_T15nF11IO,DIFFIO_T15pA15IO,DIFFIO_T14n,(DQ5T)/(DQ5T)A10IO,DIFFIO_T14p,(DQ5T)/(DQ5T)B10IO,DIFFIO_T13n,(DQ5T)/(DQ5T)C9IO,DIFFIO_T13p,(DM5T/BWS#5T)/(DM5T/BWS#5T)D9IO,(DQS4T/CQ5T)/(DQS4T/CQ5T)E9IO,DIFFIO_T12nA9IO,DIFFIO_T12pB9U3GEP4CE6F17C8BANK8IO,DIFFIO_T11nA8IO,DIFFIO_T11pB8IO,(DQS5T/CQ5T#)/(DQS5T/CQ5T#)C8IO,(DQ3T)/(DQ5T)D8IO,DIFFIO_T10n,(DATA2),(DQ3T)/(DQ5T)E8IO,DIFFIO_T10p,(DATA3