FPGA-and-ISE14.7基础教程

基于ISE14.7的FPGA基础教程BVTZeroLiuCONTENTWhatistheFPGAFPGAdesignflowProjectenvironment：ISE14.7VerilogexamplesFunctionalsimulationProgramanddebugWHATISTHEFPGAPartoftheGraphitecircuitWhatcanFPGAdo?FPGA:FieldProgrammableGatearrayPLD:ProgrammableLogicDeviceCPLD:ComplexProgrammableLogicDeviceWHATISTHEFPGAI/O:pinsconnectedtoperipheralcircuitPLL:frequencymultiplication,frequencydemultiplicationandphaseshiftMUTIPLIERM4KBLOCK:Memoryblock,forRAMROMandFIFOdesignLOGICARRAYForcombinatorylogicandtriggerdesignProgramanddebugblock:StructureofFPGAWHATISTHEFPGASummaryofspartan-3AFPGAattributesNOTECLB:configurablelogicblockDCM:digitalclockmanagerDeviceutilizationofGraphiteFPGA(XC3S400A)FPGADESIGNFLOW——IMPLEMENTATIONFunctionaldescriptionReferencetohwspec.&FPGAspec.DesigninputSchematicorHDL(RTL)PinassignmentPlannerorTCLscriptSynthesisOutputgate-levelnetlistbasedonsomekindofFPGALogicaldescriptiontospecificdevicesPlace&routeDownloadandverifyFPGADESIGNFLOW——VERIFICATIONThreekeyverificationpointsforFPGAimplementationBehavioralsimulationPost-place&routestatictiminganalysisDownloadandverifyincircuitPost-synthesisgate-levelsimulationandpost-place&routetimingsimulationscanbedoneforproductionsignoffPost-place&routetimingsimulationsarealsooftendonetoverifyboard-andsystem-leveltiming7IDE(INTEGRATEDDEVELOPMENTENVIRONMENT)THEMAININTERFACEOFISE14.7DESIGNSPEC.ANDPROCESSBVTFPGAdesignprocessReferenceDocuments:HWspec.SchematicFPGAspec.FPGAdesignprocessGraphitedocuments1,Createanewproject2,Projectname,locationandsourcetype3,ChosedeviceandtoolsIDE:CREATEANEWPROJECT4,FinishIDEANEWPROJECT工程名器件名字生成了空的工程框架IDECREATE/ADDNEWSOURCEIDEACOMPLETEDPROJECTPROJECTFILES——(*.V)模块开始和结束（figure1）变量声明（figure2）数据流语句低层模块实例（figure3）行为描述块任务和函数Figure1Figure3Figure2VERILOGSTANDARD——PURPOSEPurpose:LessspaceHighersanitaryEasytoanalyzeanddebugEasytoreadandunderstandPortabilityVERILOGSTANDARD——STANDARDIZEDDESIGN结构层次化命名规范化常量参数化其他Clock：避免混合时钟，避免门控时钟，单模块单时钟Reset：避免模块内部产生Always：敏感变量完备化……PROJECTFILES——（*.UCF）SCHEMATICVIEWStep1:viewschematicStep2:choosestartupSCHEMATICVIEWChooseelementstocreateschematicSCHEMATICVIEWGraphitesignal:NOR_FLASH_RESET_LFUNCTIONALSIMULATIONFUNCTIONALSIMULATIONFUNCTIONALSIMULATIONSIMULATIONTOOL：ISIMGraphite：PID_LED_CONTROLsimulationREFERENCEDOCUMENTSFigure:LEDcontrol,fromGraphiteschematicFigure:ledbehaviordescription,fromGraphiteFPGAspec.SIMULATIONTOOL：ISIMGraphite：resettimingsimulationPROGRAMANDDEBUG——COMPILEFailedsuccessfulPROGRAMANDDEGUB——STARTIMPACTIMPACT——SELECT/ADDSTORAGEDEVICEIMPACT——GENERATINGPROMFILE*.mcsfile*.xsvffileDOWNLOADANDPROGRAMJTAGchainscanningDOWNLOADANDPROGRAMChoosetheprogrammableimageDOWNLOADANDPROGRAMProgram