基于VHDL语言的EDA实验报告(附源码)

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EDA实验报告——多功能电子钟姓名:张红义班级:10级电科五班学号:1008101143指导老师:贾树恒电子钟包括:主控模块,计时模块,闹钟模块,辅控模块,显示模块,蜂鸣器模块,分频器模块。1.主控模块:主要功能:控制整个系统,输出现在的状态,以及按键信息。源代码:libraryieee;useieee.std_logic_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entitymcisport(functionswitch,k,set,lightkey:instd_logic;chose21,setout:outstd_logic;lightswitch:bufferstd_logic;modeout,kmodeout:outstd_logic_vector(1downto0);setcs,setcm,setch,setas,setam,setah:outstd_logic);endmc;architectureworkofmcissignalmode,kmode:std_logic_vector(1downto0);signallight,chose21buf:std_logic;signalsetcount:std_logic_vector(5downto0);beginprocess(functionswitch,k,set,lightkey)beginiffunctionswitch'eventandfunctionswitch='1'thenmode=mode+'1';endif;iflightkey'eventandlightkey='1'thenlightswitch=notlightswitch;endif;ifmode=01thenchose21buf='0';elsechose21buf='1';endif;ifk'eventandk='1'thenifmode=01ormode=11thenkmode=kmode+'1';endif;endif;ifset='1'thenifmode=01thenifkmode=01thensetcount=000001;elsifkmode=10thensetcount=000010;elsifkmode=11thensetcount=000100;elsesetcount=000000;endif;elsifmode=11thenifkmode=01thensetcount=001000;elsifkmode=10thensetcount=010000;elsifkmode=11thensetcount=100000;elsesetcount=000000;endif;endif;endif;ifset='0'thensetcount=00000”;endif;setout=set;modeout=mode;kmodeout=kmode;chose21=chose21buf;setcs=setcount(0);setcm=setcount(1);setch=setcount(2);setas=setcount(3);setam=setcount(4);setah=setcount(5);endprocess;endwork;仿真波形:2.计时模块主要功能:记录时间,正常计时。60进制libraryieee;useieee.std_logic_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entitycount60isport(clk,clr:instd_logic;co:outstd_logic;outh:outstd_logic_vector(7downto4);outl:outstd_logic_vector(3downto0));endcount60;architectureworkofcount60issignalbufh:std_logic_vector(7downto4);signalbufl:std_logic_vector(3downto0);beginprocess(clk)beginifclr='0'thenbufh=0000;bufl=0000;elsif(clk'eventandclk='1')thenif(bufh=0101andbufl=1001)thenco='1';bufh=0000;bufl=0000;elsif(bufl=1001)thenbufl=0000;bufh=bufh+1;elsebufl=bufl+1;co='0';endif;endif;outh=bufh;outl=bufl;endprocess;endwork;24进制libraryieee;useieee.std_logic_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entitycount24isport(clk:instd_logic;co:outstd_logic;outh:outstd_logic_vector(7downto4);outl:outstd_logic_vector(3downto0));endcount24;architectureaofcount24issignalbufh:std_logic_vector(7downto4);signalbufl:std_logic_vector(3downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenif(bufh=0010andbufl=0011)thenco='1';bufh=0000;bufl=0000;elsif(bufl=1001)thenbufl=0000;bufh=bufh+1;elsebufl=bufl+1;co='0';endif;endif;outh=bufh;outl=bufl;endprocess;enda;keyen.vhdlibraryieee;useieee.std_logic_1164.all;entitykeyenisport(en,keyin:instd_logic;keyout:outstd_logic);endkeyen;architectureworkofkeyenisbeginprocess(en,keyin)beginifen='1'thenkeyout=keyin;elsekeyout='0';endif;endprocess;endwork;chose21.vhdlibraryieee;useieee.std_logic_1164.all;entitychose21isport(clk,add,chose:instd_logic;co:outstd_logic);endchose21;architectureworkofchose21isbeginprocess(chose,clk,add)beginifchose='1'thenco=clk;elseco=add;endif;endprocess;endwork;3.闹钟模块:主要功能记录闹钟时间信息,输出闹钟时间信息源代码:同上:keyen.vhdcount60.vhdcount24.vhd4.辅控模块:主要功能处理显示,以及蜂鸣器的信号。时钟输入与闹钟输入相比较,组成闹钟功能,以及整点报时功能。源代码Ac.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityacisport(clk,lightonoff:instd_logic;mode,kmode:instd_logic_vector(1downto0);csh,csl,cmh,cml,chh,chl,ash,asl,amh,aml,ahh,ahl:instd_logic_vector(3downto0);q0,q1,q2,q3,q4,q5,q6,q7:outstd_logic_vector(3downto0);lightswitch,sound512,sound1024,timeok:outstd_logic);endac;architectureworkofacissignalq0b,q1b,q2b,q3b,q4b,q5b,q6b,q7b:std_logic_vector(3downto0);beginprocess(chh,cmh,csh,ash,ahh,amh,chl,cml,csl,asl,ahl,aml,mode,kmode,clk)beginifmode=00ormode=01then--闪烁功能开始q0b=csl;q1b=csh;q2b=1010;q3b=cml;q4b=cmh;q5b=1010;q6b=chl;q7b=chh;elsifmode=10ormode=11thenq0b=asl;q1b=ash;q2b=1010;q3b=aml;q4b=amh;q5b=1010;q6b=ahl;q7b=ahh;endif;ifclk='1'thenifmode=00ormode=10thenq0=q0b;q1=q1b;q2=q2b;q3=q3b;q4=q4b;q5=q5b;q6=q6b;q7=q7b;elsecasekmodeiswhen01=q0=1111;q1=1111;q2=q2b;q3=q3b;q4=q4b;q5=q5b;q6=q6b;q7=q7b;when10=q0=q0b;q1=q1b;q2=q2b;q3=1111;q4=1111;q5=q5b;q6=q6b;q7=q7b;when11=q0=q0b;q1=q1b;q2=q2b;q3=q3b;q4=q4b;q5=q5b;q6=1111;q7=1111;whenothers=q0=1111;q1=1111;q2=1111;q3=1111;q4=1111;q5=1111;q6=1111;q7=1111;endcase;endif;elseq0=q0b;q1=q1b;q2=q2b;q3=q3b;q4=q4b;q5=q5b;q6=q6b;q7=q7b;endif;--闪烁功能完毕--整点报时功能开始ifcmh=0101andcml=1001thenifcsh=0101thenifcsl=0001orcsl=0010orcsl=0101orcsl=0111thensound512='1';elsifcsl=1001thensound1024='1';elsesound512='0';sound1024='0';endif;endif;endif;--正点报时功能完--显示开关功能开始iflightonoff='1'thenlightswitch='0';elselightswitch='1';endif;--显示开关功能完毕--闹钟功能开始ifchh=ahhandcmh=amhandchl=ahlandcml=amlthentimeok='1';elsetimeok='0';endif;--闹钟功能完毕endprocess;endwork;5.显示模块:主要功能处理辅控传来的显示信号,在数码管上直接的显示数字。源代码Chose81.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;useiee

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