AXIS总线时序及Vivado仿真中信号输入参考代码

在该Testbench编辑过程中，通过计数器及状态机，按照AXIS总线格式给输入端口相应的数据及控制信号。FFT输入端口配置及数据输入时序如上图所示，复位信号至少保持2个时钟的低电平，在s_axis_config_tready为高电平‘1’后，才能进行配置使能s_axis_config_tvalid和配置参数输入s_axis_config_tdata。在s_axis_data_tready为高电平‘1’后，才能给输入数据只是信号s_axis_data_tvalid，s_axis_data_tlast及数据信号s_axis_data_tdata。直接放代码，然后说明使用注意事项。`timescale1ns/1psmoduletb_fft_ifft;regaclk;regaresetn;reg[31:0]s_axis_config_tdata;regs_axis_config_tvalid;wires_axis_config_tready;reg[31:0]s_axis_data_tdata;regs_axis_data_tvalid;regs_axis_data_tlast;wire[31:0]m_axis_data_tdata_ifft;wire[23:0]m_axis_data_tuser_ifft;wirem_axis_data_tvalid_ifft;wirem_axis_data_tlast_ifft;//integerinputfile1;//integerinputfile2;reg[15:0]data_i[28671:0];reg[15:0]data_q[28671:0];reg[31:0]data_sin[28671:0];integeroutputfile1;integeroutputfile2;initialbegin//inputfile1=$fopen(E:/vivado_prj/ifft_fft/ifft_fft.srcs/sources_1/imports/new/data_i_rmcp_b.txt,r);//inputfile2=$fopen(E:/vivado_prj/ifft_fft/ifft_fft.srcs/sources_1/imports/new/data_q_rmcp_b.txt,r);$readmemb(E:/vivado_prj/fft_ifft_scaled/fft_ifft_scaled.srcs/sources_1/imports/new/data_i_rmcp_b.txt,data_i,0,28671);$readmemb(E:/vivado_prj/fft_ifft_scaled/fft_ifft_scaled.srcs/sources_1/imports/new/data_q_rmcp_b.txt,data_q,0,28671);$readmemb(E:/vivado_prj/fft_ifft_scaled/fft_ifft_scaled.srcs/sources_1/imports/new/data_sin.txt,data_sin,0,28671);//$fclose(inputfile1);//$fclose(inputfile2);endinitialbeginoutputfile1=$fopen(fft_out.txt,w);outputfile2=$fopen(ifft_out.txt,w);endalways@(posedgeaclk)beginif(uut.m_axis_data_tvalid)$fwrite(outputfile1,%b\n,uut.m_axis_data_tdata);endalways@(posedgeaclk)beginif(uut.m_axis_data_tvalid_ifft)$fwrite(outputfile2,%b\n,uut.m_axis_data_tdata_ifft);endfft_ifftuut(.aclk(aclk),.aresetn(aresetn),.s_axis_config_tdata(s_axis_config_tdata),.s_axis_config_tvalid(s_axis_config_tvalid),.s_axis_config_tready(s_axis_config_tready),.s_axis_data_tdata(s_axis_data_tdata),.s_axis_data_tvalid(s_axis_data_tvalid),.s_axis_data_tlast(s_axis_data_tlast),.m_axis_data_tdata_ifft(m_axis_data_tdata_ifft),.m_axis_data_tuser_ifft(m_axis_data_tuser_ifft),.m_axis_data_tvalid_ifft(m_axis_data_tvalid_ifft),.m_axis_data_tlast_ifft(m_axis_data_tlast_ifft));initialbeginaclk=0;aresetn=0;s_axis_config_tdata=32'h00450000;#100aresetn=1;endalways#3.2aclk=~aclk;parameterstate_idle=0;parameterstate_config=1;parameterstate_sym=2;parameterstate_waiting=3;parameterstate_end=4;reg[2:0]curr_state,next_state;reg[31:0]cnt_subcarrier;reg[31:0]cnt_waiting;reg[31:0]cnt_sym;always@(posedgeaclkornegedgearesetn)beginif(!aresetn)curr_state=state_idle;elsecurr_state=next_state;endalways@(*)beginif(!aresetn)next_state=state_idle;elsebegincase(curr_state)state_idle:beginif(s_axis_config_tready)next_state=state_config;elsenext_state=state_idle;endstate_config:beginnext_state=state_sym;endstate_sym:beginif(cnt_subcarrier==32'd2047)next_state=state_waiting;elsenext_state=state_sym;endstate_waiting:beginif(cnt_waiting==32'd1024)beginif(cnt_sym==32'd14)next_state=state_end;elsenext_state=state_sym;endelsenext_state=state_waiting;endstate_end:beginnext_state=state_end;endendcaseendend//cnt_subcarrieralways@(posedgeaclkornegedgearesetn)beginif(!aresetn)cnt_subcarrier=32'b0;elsebeginif(curr_state==state_sym)begincnt_subcarrier=cnt_subcarrier+32'd1;endelsecnt_subcarrier=32'd0;endend//cnt_waitingalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)cnt_waiting=32'd0;elsebeginif(curr_state==state_waiting)cnt_waiting=cnt_waiting+32'd1;elsecnt_waiting=32'd0;endend//cnt_symalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)cnt_sym=32'd0;elsebeginif(curr_state==state_sym&&next_state==state_waiting)cnt_sym=cnt_sym+32'd1;elsecnt_sym=cnt_sym;endend//output//s_axis_config_tvalidalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)s_axis_config_tvalid=1'b0;elsebeginif(curr_state==state_config)s_axis_config_tvalid=1'b1;elses_axis_config_tvalid=1'b0;endend//s_axis_data_tdataalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)s_axis_data_tdata=32'b0;elsebeginif(curr_state==state_sym)//s_axis_data_tdata=data_sin[cnt_sym*2048+cnt_subcarrier];s_axis_data_tdata={data_i[cnt_sym*2048+cnt_subcarrier],data_q[cnt_sym*2048+cnt_subcarrier]};elses_axis_data_tdata=s_axis_data_tdata;endend//s_axis_data_tvalidalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)s_axis_data_tvalid=1'b0;elsebeginif(curr_state==state_sym)s_axis_data_tvalid=1'b1;elses_axis_data_tvalid=1'b0;endend//s_axis_data_tlastalways@(posedgeaclkornegedgearesetn)beginif(!aresetn)s_axis_data_tlast=1'b0;elsebeginif(curr_state==state_sym&&cnt_subcarrier==32'd2047)s_axis_data_tlast=1'b1;elses_axis_data_tlast=1'b0;endendendmodule首先Vivado在生成Testbench文件的时候，不会像ISE那样帮助例化好顶层模块，直接添加测试激励。自己需要完成之前的工作，一方面自己熟悉了Testbench文件编辑，但是也带来了很多麻烦，如果端口很多，增加了一部分工作量。