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10-110.1IntroductionJustlikeanyanalogbuildingblock,designinganamplifierwithhighperformanceisquiteanart!Sincesuchamulti-dimensionalproblemtypicallyinvolvessomanyconflictingspecifications,itisimpossibletodevelopastandardprocedure.Firstofall,thereexistsomanydifferentcircuitconfigurationstochoosefrom.Dependingonthespecifications,onemaybemoresuitablethanothers.Evenafteraparticularconfigurationhasbeenselected,therearestillproblemswithchoosingrightparameterstomeetand/ortooptimizegivenspecifications.Manytimes,some“reasonable”assumptionsneedtobemadeandtobeverifiedlater.Incaseaspecificationisnotmetorsomeassumptionisfoundinvalid,aniterationofthewholedesigncyclemayberequired.Nevertheless,someguidelinescanbedevelopedtohelpwiththedesign.Thischapterattemptstodescribetheseguidelinesthroughaspecificexample.Afterchoosingaparticularcircuitconfigurationandgivingitsomejustification,wewillconsiderindetailshowaCMOSamplifiercanbedesignedtomeetcertainspecifications.10.2CircuitConfigurationForthepurposeofillustration,letusassumethatthetypicaltwo-stageCMOSamplifiershowninFig.10.1ischosenasagoodcompromiseamongallrequirementofgain,powerconsumption,andlowsupplyvoltage.Non-cascodeconfigurationisusedtoenableanoperationatlowsupplyvoltages.Acascadeisusedtoachieveahighoverallgain.PMOStransistorsareusedastheinputdevicestominimizethenoiseandtheoffsetvoltage.Finally,acompensationcapacitorisnecessarytostabilizethecircuitwithsomegivenphasemargin.Chapter10AMPLIFIERDESIGNEXAMPLECHAPTER10:AMPLIFIERDESIGNEXAMPLE10-210.3DesignEquationsAfterthecircuitconfigurationisdetermined,itisimportanttoinvestigateandderive,ifnecessary,itsdesignequations.Here,thedesignequationsaresummarizedasfollows.Thelow-frequencygaincanbeeasilyobtainedtobe(10.1)Thetwodominantpolesaregivenby(10.2)(10.3)Vi+-VoM2M1M4M3M5CCM6M7Fig.10.1SchematicofaCMOSamplifiertobedesignedM8IBM9VSSVDDVDDR2R1BAA0gm1R1()gm5R2()=p111gm5R2×+()CCR1-----------------------------------------------=p2gm5CCCACBCACCCCCB++-----------------------------------------------------gm5CACB+-------------------≈=CHAPTER10:AMPLIFIERDESIGNEXAMPLE10-3whereCAandCBarethetotalcapacitanceseenatnodesAandB,respectively.Theunity-gainfrequencycanbederivedtobe(10.4)Withrespecttothephasemargin,thesecondpoleandtheunity-gainfrequencyarerelatedas(10.5)Theright-halfplaneintroducedbythecompensationcapacitorcanbeeliminatediftheequivalentresistanceofM9ischosentobe(10.6)Theslewratecanbecalculatedas(10.7)Tominimizethesystematicoffsetvoltage,itisnecessarythat(10.8)and(10.9)Asaresult,(10.10)and(10.11)ωogm1CC-------=p2ωoforPM45°=2ωoforPM60°==RM91gm5-------=SRIBCC------IBgm1-------ωo==Vgs3Vgs4Vds4Vgs5===Vgs6Vgs7=WL⁄()3WL⁄()5--------------------WL⁄()4WL⁄()5--------------------IB2⁄ID5-----------==WL⁄()6WL⁄()7--------------------ID6ID7------ID5ID7------12---===WL⁄()5WL⁄()3--------------------CHAPTER10:AMPLIFIERDESIGNEXAMPLE10-4Ifthedevicesareperfectlymatched,duetothecurrentmirrorasanactiveload,thecommon-moderejectionratioisinfinitelylarge,(10.12)Incasenotenoughinformationisgiven,thefollowingusefulrulesofthumbcanbeused:i)Thesecondstageisbiasedathighercurrentthantheinputstage,i.e.gm5gm1.ii)Thecompensationcapacitorandtheloadcapacitorareequal,i.e.CC=CL.iii)Thetransconductanceismaximizedbybiasingtheinputdevicessuchthat(10.13)Note:Typically,theloadcapacitancemustbespecified.Thecompensationcapacitorcanthenbecalculateddependingonthegivenspecifications.1.PowerConstraint:Ifthepowerconstraintisgiven,thebiascurrentcanbedetermined.Combinedwiththeslewrate,thecompensationcapacitorcanbeestimated.2.NoiseConstraint:Ifthenoiseconstraintisgiven,thetransconductanceoftheinputdevicescanbedetermined.Combinedwiththedesiredunity-gainbandwidthandphasemargin,thecompensationcapacitorcanbeestimated.10.4DesignProcedureAsanillustration,letusdesigntheamplifiertomeetthefollowingspecifications.FromEq.10.5,tomeettheminimumrequirementofthephasemargin,weshouldhaveParametersSpecificationsLow-frequencygainA0≥90dBUnity-gainfrequencyf0≥10MHzSlewrateSR≥5V/μsPhasemarginPM≥60oCMRR≥50dBLoadCapacitorCL10pFCMRRAdmAcm---------∞≈=VDSsatVGSVT–0.2V==CHAPTER10:AMPLIFIERDESIGNEXAMPLE10-5(10.14)CombiningwithEqs.10.3-10.4toget(10.15)Sincenopowerconstraintisprovided,asaruleofthumb,wecanassumethat(10.16)Asaresult,thetransconductancesaregivenby(10.17)(10.18)Fromtheslew-ratespecification,wecanobtain(10.19)Withtheinformationobtained,therest,includingthegainandtheCMRR,arewelldefined.Beforethetransistors’aspectratiosW/L’saredetermined,itisimportanttoverifywhetherthesespecificationsaremet.FromEq.10.1and10.12,theoverallgainandthecommon-moderejectionratioaregivenby(10.20)(10.21)wherethechannellengthmodulationfactorsforbothPMOSandNMOSareassumedtobe0.02V-1.Note:If,forsomereason,oneofthesespecificationswerenotmet,allthedesignstepswouldhaveneededtoberepeatedwithdifferentassumptions.Forexample,ifahigherCMRRweredesired,theinputtransconductancecouldhavebeenincreasedoracascodebiascurrentcouldhavebeenused.p22ωoforPM60°==gm5CACB+-------------------gm5CL-------2gm1CC-------=≈2ωo=CCCL10pF==gm52ωoCL×22π10M××10p×1.26mAV⁄===gm1ωoCC×2π10M×10p×0.63mAV