现代电子系统设计

1•FPGA(2004.10)1.VHDL(2002.10,)2.EDA(2002.10)3.DSP(2003.8)4.VHDL(1998.8)2•1EDA42FPGACPLD43VHDL44EDAQuartusIIModelSim45QuartusSignalTapIIIP46FPGA47FPGADSP4821QuartusII4.142NiosII43DSP43•1.EDAEDA2.EDAVHDL3.EDAVHDL4.VHDL5.4•EDA1.EDA2.3.VHDL4.VHDL5.EDA6.EDA7.EDA5•1.EDA1.EDAEDAEDAEDA6•2.EDA12070CAD22080CAE32090EDASystemonachip(SOC)1.EDA•••DSP•PCBEMIEDA7•2(HDL)341.EDA3.EDA18•123454.EDA1.EDA9•1VHDL234565.EDA1.EDA10•EDAVHDLVHDLVHDLFPGA/CPLD///EDIFXNFVHDLSRAMVHDL/VerilogVHDL1.EDA11•EDA√1.EDA2.3.VHDL4.VHDL5.EDA6.EDA7.EDA12•2.1.(BottomUp)000001600101150111114111110311010021000001Q0n+1Q1n+1Q2n+1Q0nQ1nQ2nCPQ2n+1=Q1nQ2DQ1n+1=Q0nQ1DQ0Q0JK00000101110011111010101013•nnnnnnnnnnnnnnnnnnnnnnnQKQJQQQQQQQQQQQQQQQQQQQQQ00000210211020002110202110+=)+(+•)(=++)+(=++=+2112DQQnn==+1011DQQnn==+Q2Q1Q00001111001001110Q0n+1nnnnnnQQKQQQQJ21021210=+==Q2Q1Q00001111000101011Q2n+1Q2Q1Q00001111000001111Q1n+1nQD01=nQD12=2.14•2.15•1.(BottomUp)2.3.4.2.16•EDA√1.EDA√2.3.VHDL4.VHDL5.EDA6.EDA7.EDA17•3.VHDL•(a)(b)VHDLEX4_618••VHDLVHDLVerilogHDLABEL_HDL•1RTLVHDLRTLVerilogABELRTL2VHDLVerilogABEL3VHDLVerilogABEL3.VHDL19•4VHDLVerilogABEL5EDAVHDLVerilogEDAABELDATAIO6VHDLVerilogIEEEABEL3.VHDL20•1.Top_downRTLBottom_up“”“”3.VHDL21•1-11-2“”3.VHDL22•2.ASIC3.4.5.HDL3.VHDL23•1)2)3)4)5)EDA1)2)(Library)3)4)5)6)IP7)8)9)10)11)EDA3.VHDL24•EDA√1.EDA√2.√3.VHDL4.VHDL5.EDA6.EDA7.EDA25•4.VHDL1VHDL1982198712IEEE_STD_1076VHDLEDAVHDLVHDLFPGA2VHDLHDLVHDLVHDL26•4.VHDL3VHDLVHDLVHDLVHDL4VHDLVHDL27•5.EDAEDA21‹‹EDA‹EDA‹EDA28•‹FPGACPLD‹EDAASICIP‹IP‹SoC5.EDA29•SOCSYSTEMONACHIPSOPCSYSTEMONAPROGAMMABLECHIPCSOCCONFIGURABLESYSTEMONACHIP30•EDAASICFPGA/CPLDASICMPGACBICFCICASICSOPC/SOCASICEDAASIC6.EDA31•SOCSYSTEMONACHIPSOPCSYSTEMONAPROGAMMABLECHIPSOPCNIOSEthernetInterfaceARMUARTRAM/ROMFIFOUSBPCIDSPBlocksPLLsSDRAMCONTROLVGAPS2MultiplyUnitJPEGCPL(FIR,IIR,FFT)32•FPGANiosIPFlashROMSRAMSDRAMBiosROMRAMFIFOSDRAMDSPRS232CANDMAVGARS232PS2PS2EthernetPICVGAPS/2/D/AA/DLCDLEDUSBUARTFIFOI/OSOPC33•EDAFPGASOPCDSPDSP+++34•‹FPGA---,?---,!20037Forbes‹FPGAFPGA,FPGA,!35•FPGAWincomSystemsDVD,50IBMSUN5000SUNSPARCFPGAFPGA2000FPGASUN“50300”FPGAFPGAPalmFPGAXILINXW.RoelandtsFPGA50JohnvonNeumann----FPGA36•W.Roelandts“”“FPGAFPGAFPGAIntelFPGATimeLogicFPGASUNALTERAFPGATimeLogic“1000”TimeLogicChristopherHoover25AnnapolisMicroSystemsXILINXFPGABlueArcALTERAFPGANetworkApplianceEMCBellevueMidStreamTechnologiesXILINXFPGA3.52FPGA425FPGAForbes.comFPGA37•FPGAFPGAFPGAFPGAGoldmanSachsFPGAStarBridgeSystemsFPGAViva“hypercomputer“”NASAUniversityofCalifornia,BerkeleyBrighamYoungUniversityFPGA38•1.2.ASIC3.ASIC6.EDA39•IC¾(Deep-Submicron)0.18m0.13m¾¾EDA¾SoC7.EDA40•(19952010)199519982001200420072010µm0.350.250.180.130.10.07/cm24M7M13M25M50M90M/10.50.20.10.050.024555666778/m224016014012010025182020222224ASICmm245066075090011001400()V3.32.51.81.51.20.9I/O90013502000260036004800/MHz1505007001000150030007.EDA