硅基光电子技术在大数据时代的机遇与挑战(周治平)25

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1:ChallengeandOpportunityinBigDataEra周治平.北京大学ZhipingZhouPekingUniversity,Chinazjzhou@pku.edu.cnCIOEC,Sept.2,2015Shenzhen,China2://spm.pku.edu.cn/SiliconPhotonicsEditedbyZhipingZhou•Interconnectandtheemergingsiliconphotonics•Currentsiliconphotonicsinterconnect•Difficultiesandchallenges•Conclusions5:bothquantityandcontinuousimprovementofdeviceperformanceSource:IntelIDF146’sinterconnectsindatacentersRacktorack:optical(VCSEL-based)In-rack:imminenttransformationtoopticalsolutionSource:MPaniccia,PresentationatPurdueUniversity(2007).7’sracksindatacentersCopperinterconnectcannolongerprovidethedesiredspeed,mustturntoopticalinterconnects.•Highspeed•Lowenergyconsumption•EasytouseIn-rack:copperinterconnectdifficultfor20Gbps/wireTrend:25G/50G/100Gorhigher8•Spacedivisionmultiplexing:multiplecoresorfibersUpto64fibers(MXC)inanAOC,aggregatedcapacityof1Tbps•Wavelengthdivisionmultiplexing:FourwavelengthsCWDMormoreinthefutureScalability:multiplexingSpeed25Gbps/channelcommercialized,50~70Gbps/channelpossibleinthefutureSpeedperchannel,SDMandWDMareallscalable.Capacitycanbereadilyupgraded.9:activeopticalcable(AOC)Easy-to-useopticalsolutionWirecontainingopticaltransceivers(WDMoptional)Channel10G,25GorhigherMultimodefibers/singlemodefibersChangetoAOC10:•CompatiblewithCMOSfabricationprocessing:lowcost,massiveproduction•Single-mode&SMF:longtransmissionrange,highspeed•Chipsizeopticalsolutionswithemphasizeoninteractionbetweenphotonsandelectrons•Applicationsininterconnections,communications,andotherareassuchasinternetofthings,nonlinearoptics,Thehigherthecapacityandproductiondemand,themorecompetentissiliconphotonicsthanVCSEL.11:poolingstructureNewarchitectureenabledbyhigherinterconnectioncapacitySource:IntelIDF14•Interconnectandtheemergingsiliconphotonics•Currentsiliconphotonicsinterconnect•Difficultiesandchallenges•Conclusions13,NatureCommunications,20142.50-Gb/sSiliconMach-ZehnderInterferometer-basedOpticalModulatorwithonly1.3VppDrivingVoltages,2014IEEEEPTCResonator-based25GbpsER=6dBIL=1dBVpp=0.5V0.79fJ/bitMITMZmodulator50GbpsER=4.44dBIL=4.2dBL=4mmVpp=1.3V676fJ/bitIME14,OpticsExpress,20142.HighCouplingEfficiencyEtchedFacetTapersinSilicon,CLEO,2012GratingcouplerIL:0.62dB(TE)1dBBW:40nmUniversityofStuttgartInversetapercouplerIL:0.7dBDeepTrenchCornellUniversity15'sFirstEnd-to-EndSiliconPhotonicslink50Gin2010and100Gin201316://spm.pku.edu.cn/SummaryforcurrentdevelopmentAcademia:mainlyfocusesondevicelevelresearch,lessonsystemlevelresearchIndustry:somesystemsalreadycommercialized.Thereisalsopotentialtodobetter.RelativelymaturedevicedesignFewaccessiblepackagingplatforms,packagingtechniquestobefurtherdevelopedandrefinedDeviceperformanceandfabricationtechnologiesfallbehindleadingcountriesDifficultiesinChinaWorldwide•Interconnectandtheemergingsiliconphotonics•Currentsiliconphotonicsinterconnect•Difficultiesandchallenges•Conclusions19://spm.pku.edu.cn/Challenge1:EnergyconsumptionLoweringtheenergyconsumptioninsiliconphotonicdevicesandsystems,2015.Proposesmethodsfordevice-levelopticallinkenergyreductionandinsightsintoon-chiplasersReviewscurrentopticallinkperformanceintermsofenergyandinsertionlossFeaturedpaper21:EnergyconsumptionVerychallenginggoalRequiresconcertedresearcheffortsInterconnectcapacitydemandwillcontinuetogrowinthefuture,andenergy(perbit)needstobereducedtokeepthetotalconsumptionacceptable.DeviceRequirementsforOpticalInterconnectstoSiliconChips,ProceedingsofIEEE,2009•Short-termenergycostgoal:——nomorethancopperinterconnects•Linkenergy:1pJ/bitincludingelectricalcircuitsNowOpticalinterconnectenergygoal22:EnergyconsumptionSignificantenergyreduction,convenientwhennometalpatternsinairtrencharea•Standardprocessinsomefoundries•Canbefurtherprocessedtohaveundercut•Significantthermaltuningefficiencyimprovementof6x~20x,highestreporteddata:58x(withundercut)Totalenergyconsumption(calculatedas10x)Vertical:~89fJ/bit@25GbpsLateral:~160fJ/bit@25GbpsSubmilliwattthermo-opticswitchesusingfreestandingsilicon-on-insulatorstripwaveguides,OE,2010Solution1:airtrenchtechnique23:III-V-basedlaseronsiliconFlip-chipWaferbondingEpitaxialgrowthChallenge2:on

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