01-微电子制造工艺流程

Prof.ShiyuanLiuPage1电子工业专用设备主讲教师：刘世元教授吴懿平教授办公电话：87548116移动电话：[phone]电子邮件：[e-mail]机械学院先进制造大楼B310武汉光电国家实验室B102Prof.ShiyuanLiuPage2讲授内容第一讲：微电子制造工艺流程（回顾）第二讲：微电子制造装备概述光刻工艺及基本原理第三讲：光刻机结构及工作原理(1)第四讲：光刻机结构及工作原理(2)Prof.ShiyuanLiuPage3本讲内容：CMOS工艺流程录像：IC制造工艺CMOS工作原理CMOS工艺流程IC工艺及其分类IC制造厂的工艺分区Prof.ShiyuanLiuPage4CMOS工作原理(1)回顾录像：IC制造工艺CMOS=ComplementaryMetal-Oxide-Semiconductor(Transistor)=互补金属氧化物半导体（晶体管）N-MOSP-MOSn-wellp-wellProf.ShiyuanLiuPage5CMOS工作原理(2)N-MOS电路(1)Source=源Drain=漏Gate=栅p-typen-typen-typeMetal=金属Metal=金属Prof.ShiyuanLiuPage6CMOS工作原理(3)N-MOS电路(2)Source=源Drain=漏Gate=栅Prof.ShiyuanLiuPage7CMOS工作原理(4)N-MOS电路(3)Source=源Drain=漏Gate=栅Prof.ShiyuanLiuPage8CMOS工作原理(5)N-MOS电路(4)Source=源Drain=漏Gate=栅Prof.ShiyuanLiuPage9CMOS工作原理(6)P-MOS电路(1)Source=源Drain=漏Gate=栅n-typep-typep-typeMetal=金属Metal=金属Prof.ShiyuanLiuPage10CMOS工作原理(7)P-MOS电路(2)Source=源Drain=漏Gate=栅Prof.ShiyuanLiuPage11CMOS工作原理(8)P-MOS电路(3)Source=源Drain=漏Gate=栅Prof.ShiyuanLiuPage12CMOS工艺流程1.ShallowTrenchFormation2.WellFormation3.GateFormation4.Source/DrainFormation5.SalicideFormation6.1stInterconnectLayer7.2ndthroughNthInterconnectLayers8.Passivation4.P-MOSSource/DrainFormation2.n-wellformation2.p-wellformation1.TrenchFormation3.GateFormation4.N-MOSSource/DrainFormation5.SalicideFormation6&7.InterconnectLayers8.PassivationN-MOSP-MOSProf.ShiyuanLiuPage13StartingPointStartingPoint:Puresiliconwafer(heavily-doped)withalightly-dopedepitaxial(Epi)layer.AnEpilayerisusedtoprovideacleanerlayerfordeviceformationandtoprevent“latch-up”ofCMOStransistors.SiliconSubstrateP+~2microns~725micronsSiliconEpiLayerP-Epitaxial=外延淀积or外延生长Prof.ShiyuanLiuPage14ShallowTrenchFormationGrowPadOxide:Averythin(~200A)layerofsilicondioxide(SiO2)isgrownonthesurfacebyreactingsiliconandoxygenathightemperatures.Thiswillserveasastressrelieflayerbetweenthesiliconandthesubsequentnitridelayer.SiliconSubstrateP+SiliconEpiLayerP-PadOxideThinFilm=薄膜Prof.ShiyuanLiuPage15DepositSiliconNitride:Alayer(~2500A)ofsiliconnitride(Si3N4)isdepositedusingChemicalVaporDeposition.Thiswillserveasapolishstoplayerduringtrenchformation.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitrideCVD=ChemicalVaporDeposition=化学气相淀积Prof.ShiyuanLiuPage16PatternPhotoresistforDefinitionofTrenches:Oneofthemostcriticalpatterningstepsintheprocess.0.5-1.0micronsofresistisspun,exposed,anddeveloped.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitridePhotoresistTrench=沟槽Patterning=图形转移Photoresist=光刻胶Expose=曝光Develop=显影Prof.ShiyuanLiuPage17EtchNitrideandPadOxide:Areactiveionetch(RIE)utilizingfluorinechemistryisused.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitridePhotoresistEtch=刻蚀RIE=ReactiveIonEtch=反应离子刻蚀Fluorine=氟Prof.ShiyuanLiuPage18EtchTrenchesinSilicon:Areactiveionetch(RIE)utilizingfluorinechemistryisused.Definestransistoractiveareas.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitridePhotoresistTransistorActiveAreasIsolationTrenchesProf.ShiyuanLiuPage19RemovePhotoresist:Anoxygenplasmaisusedtoburnofftheresistlayer.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitrideTransistorActiveAreasIsolationTrenchesPlasma=等离子FuturePMOSTransistorFutureNMOSTransistorProf.ShiyuanLiuPage20FillTrencheswithOxide:ACVDoxidelayerisdepositedtoconformallyfillthetrenches.Theoxidewillprevent“cross-talk”betweenthetransistorsinthecircuit.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitrideFuturePMOSTransistorSiliconDioxideFutureNMOSTransistorNocurrentcanflowthroughhere!Prof.ShiyuanLiuPage21PolishTrenchOxide:ThesurfaceoxideisremovedusingaChemicalMechanicalPolish(CMP).TheCMPprocessisdesignedtostoponsiliconnitride.SiliconSubstrateP+SiliconEpiLayerP-SiliconNitrideFuturePMOSTransistorFutureNMOSTransistorNocurrentcanflowthroughhere!Polish=抛光CMP=ChemicalMechanicalPolish=化学机械抛光Prof.ShiyuanLiuPage22RemoveSiliconNitride:Awetetchinhotphosphoricacid(H3PO4)isused,completingformationofShallowTrenchIsolation(STI).SiliconSubstrateP+SiliconEpiLayerP-FuturePMOSTransistorFutureNMOSTransistorWetEtch=湿法刻蚀STI=ShallowTrenchIsolation=浅槽隔离Prof.ShiyuanLiuPage23WellFormationPatternPhotoresistforN-WellFormation:Anon-criticalmaskinglayer,utilizingthickerresisttoblocktheimplant.SiliconSubstrateP+SiliconEpiLayerP-FuturePMOSTransistorFutureNMOSTransistorPhotoresistN-Well=N阱Prof.ShiyuanLiuPage24ImplantN-Well:Adeep(high-energy)implantofphosphorousionscreatesalocalizedN-typeregionforthePMOStransistor.SiliconSubstrateP+SiliconEpiLayerP-FutureNMOSTransistorPhotoresistN-WellPhosphorous(-)IonsIonImplantation=离子注入Prof.ShiyuanLiuPage25StripN-WellPhotoresist:SiliconSubstrateP+SiliconEpiLayerP-FutureNMOSTransistorN-WellStrip=Remove=去除Prof.ShiyuanLiuPage26PhotoresistPatternPhotoresistforP-WellFormation:Anon-criticalmaskinglayer,utilizingthickerresisttoblocktheimplant.SiliconSubstrateP+SiliconEpiLayerP-FutureNMOSTransistorN-WellProf.ShiyuanLiuPage27ImplantP-Well:Adeep(high-energy)implantofboronionscreatesalocalizedP-typeregionfortheNMOStransistor.SiliconSubstrateP+SiliconEpiLayerP-PhotoresistN-WellBoron(+)IonsP-WellProf.ShiyuanLiuPage28StripP-WellPhotoresist:SiliconSubstrateP+Silico