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STM32FSMCFSMCFSMCFSMCFSMC_A[25:0]FSMCFSMC_D[15:0](1)8(FSMC_NANDInitStructure.FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_8b)FSMC_A[25:0]FSMC_D[7:0](2)16(FSMC_NANDInitStructure.FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_16b)FSMC_A[24:0]FSMC_D[15:0]FSMC4(1)AHBFSMC(2)NORPSRAMLCDLCDPSRAM216DATARAMCMDRAM(3)NANDPC(4)FSMCAHBAHBNORNANDLCDFSMCAHBFSMC0x600000000x9FFFFFFF4256M464MNORHADDR[27:26]64MNE[4:1]//NE1-Bank1NE2-Bank2NE3-Bank3NE4-Bank4NE1NOR/PSRAM64M:60000000h--63ffffffh(DATA8,FSMC_A[25:0]DATA16FSMC_A[24:0]):64000000h--67ffffffh:68000000h--6bffffffh:6c000000h--6fffffffhHADDRAHB8HADDR[25:0]STM32CPUFSMC_A[25:0]64M16HADDR[25:1]STM32CPUFSMC_A[24:0]FSMC_ASTM32F10XXFCMSLCDFSMCLCDFSMC_D[16:0]16bitFSMCNExNOR256M4NE1-NE4PD7NE1PG9NE2PG10-NE3PG12NE4FSMCNOELCDRDFSMCNWELCDRWFSMCAxLCDRAMLCDRSFSMC_A[25:0]RS=0RS=1RAM1NORFSMC_A16LCDRSLCDRAM0x60020000LCD0x6000000016bit,FSMC_A[24:0]HADDR[25:1]RAM=0x60000000+2^16*2=0x60000000+0x20000=0x600200002NORFSMC_A0LCDRSLCDRAM0x6c000002LCD0x6c000000FSMC_D[15:0]16bitFSMC_NE1bank1FSMCNOEFSMCNEWFSMCFSMCAxRSFSMC_A[24:0]BLCDADDSETDATASTADDHOLDFSMC_TCRxHCLK72MHZB0x10x00x2:)/********************************************************************************:LCD_CtrlLinesConfig*:*:*:LCDFSMC*/staticvoidLCD_CtrlLinesConfig(void){GPIO_InitTypeDefGPIO_InitStructure;/*FSMC,GPIOD,GPIOE,GPIOF,GPIOGAFIO*/RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC,ENABLE);RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOD|RCC_APB2Periph_GPIOE|RCC_APB2Periph_GPIOF|RCC_APB2Periph_GPIOG|RCC_APB2Periph_AFIO,ENABLE);/*PD.00(D2),PD.01(D3),PD.04(NOE),PD.05(NWE),PD.08(D13),PD.09(D14),PD.10(D15),PD.14(D0),PD.15(D1)*/GPIO_InitStructure.GPIO_Pin=GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_14|GPIO_Pin_15;//|GPIO_Pin_7;GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AF_PP;GPIO_Init(GPIOD,&GPIO_InitStructure);/*PE.07(D4),PE.08(D5),PE.09(D6),PE.10(D7),PE.11(D8),PE.12(D9),PE.13(D10),PE.14(D11),PE.15(D12)*//*PE3,PE4A19,A20,STM32F103ZE-EK(REV2.0)*//*PE5,PE6A19,A20,STM32F103ZE-EK(REV2.0)*/GPIO_InitStructure.GPIO_Pin=GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6;GPIO_Init(GPIOE,&GPIO_InitStructure);/*PF.00(A0(RS))*/GPIO_InitStructure.GPIO_Pin=GPIO_Pin_0;GPIO_Init(GPIOF,&GPIO_InitStructure);/*PG.12(NE4(LCD/CS))-CE3(LCD/CS)*/GPIO_InitStructure.GPIO_Pin=GPIO_Pin_12;GPIO_Init(GPIOG,&GPIO_InitStructure);GPIO_InitStructure.GPIO_Pin=GPIO_Pin_1;GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;GPIO_Init(GPIOB,&GPIO_InitStructure);GPIO_SetBits(GPIOB,GPIO_Pin_1);}staticvoidLCD_FSMCConfig(void){FSMC_NORSRAMInitTypeDefFSMC_NORSRAMInitStructure;FSMC_NORSRAMTimingInitTypeDefFSMC_NORSRAMTimingInitStructure;/*--FSMCConfiguration------------------------------------------------------*//*-----------------------SRAMBank4----------------------------------------*//*FSMC_Bank1_NORSRAM4configuration*/FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime=1;FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime=0;FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime=2;FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration=0;FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision=0;FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency=0;FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode=FSMC_AccessMode_B;/*ColorLCDconfiguration------------------------------------LCDconfiguredasfollow:-Data/AddressMUX=Disable-MemoryType=SRAM-DataWidth=16bit-WriteOperation=Enable-ExtendedMode=Enable-AsynchronousWait=Disable*/FSMC_NORSRAMInitStructure.FSMC_Bank=FSMC_Bank1_NORSRAM4;FSMC_NORSRAMInitStructure.FSMC_DataAddressMux=FSMC_DataAddressMux_Disable;FSMC_NORSRAMInitStructure.FSMC_MemoryType=FSMC_MemoryType_SRAM;FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_16b;FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode=FSMC_BurstAccessMode_Disable;FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity=FSMC_WaitSignalPolarity_Low;FSMC_NORSRAMInitStructure.FSMC_WrapMode=FSMC_WrapMode_Disable;FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive=FSMC_WaitSignalActive_BeforeWaitState;FSMC_NORSRAMInitStructure.FSMC_WriteOperation=FSMC_WriteOperation_Enable;FSMC_NORSRAMInitStructure.FSMC_WaitSignal=FSMC_WaitSignal_Disable;FSMC_NORSRAMInitStructure.FSMC_ExtendedMode=FSMC_ExtendedMode_Disable;FSMC_NORSRAMInitStructure.FSMC_WriteBurst=FSMC_WriteBurst_Disable;FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct=&FSMC_NORSRAMTimingInitStructure;FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct=&FSMC_NORSRAMTimingInitStructure;FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);/*-BANK3(ofNOR/SRAMBank0~3)isenabled*/FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4,ENABLE);}BANK1NOR/PSRAM1DATA0x6c000000LCDRSFSMC_A0CMD0x6c000002FSMCDATACMD