基于FPGA的VGA接口设计

FPGAVGAFPGAstm32VGAVGAVGAstm32CRTVGAOLEDOLEDSTM32Intel8080STM32FSMCFPGAVGAOLEDSTM322VGAdisplayinterfacedesignbasedonFPGAAbstractAspeoplepursuitformorefunfromgamesandtheprogressofscienceandtechnology,inthewargame,inordertomaketheteamhaveaclearunderstandingofthebattlefieldsituation,weusetheOLEDwhichisakindofmicrodisplaytoshowalltheinformation.ThemicrodisplaygenerallyusetheVGAinterface.Withthedevelopmentofmanufacturingtechnology,VGAinterfacehasbecomemorecompact,ithasadvantagesoflowcost,highresolutionrichcoloretc.FPGAwithhighflexibilitycanbedesigneddifferentlyaccordingtotheneeds,achievethelowestcost.ThispaperdesignedaVGAdisplayinterfacebasedonFPGA.UsefulsignaloftheVGAinterfaceisthehorizontalsynchronizationsignal,verticalsynchronizationsignalandR,G,Bsignals.Inthispaper,weuseFPGAtoproducethehorizontalsynchronizationsignalandverticalsynchronizationsignal,andthedatafrommemoryisconvertedintoanalogR,G,BsignalbyFPGA.ThedesignuseISSI25616SRAMasthememoryconnecttedbySTM32F103VCT6.KeywordsFPGA,VGAinterface,OLED311.1LCDCRTLCD40-6019201080OLEDLCDOLED1LCDOLED11024768OLEDOLEDOLEDPLEDLGOELCDTPLEDOLED65530OLEDOLEDTFTLCDOLEDSCH-X339256OLEDOELLGCU81808280OLEDLCDOLEDeMaginOLEDOLEDiTheaterOLED1.2CSCS4CSVGAOLEDOLEDOLED1.3VGAARM9LCDVGALCDLCDVGAD/AS3C2410LCD-CON2/3HOZVALLINEVALHOZVALLINEVAL12HOZVAL=-11LINEVAL=-12VCLKLCONCON1CLKVALVCLKCLKVALVCLKHz=HCLK/[(CLKVAL+1)2]3VSYNCLCON-CON1LCD-CON2/3/4VSYNCVB-PDVFPDLINEVALHSYNCHBPDHFPDHOZVALCLKVALVM/VDENVGAVSYNCVCLKVGAHSYNCVMVCLKVMVCLKHSPW=10HBPD=100HFPD=47VSPW=1VBPD=37VFPD=4CPUFPGAVGAFPGACPUVGA5FPGA-VGAFPGAVGAVGAFPGAFPGAFPGAFPGAVGAFPGA:(1)(2)FPGAI/O1.4OLED+VGA+FPGA+STM321OLED1VGAvideographicarrayVGASTM32NANDFLASHVGAOLEDRAMFIFO6FPGAFPGAASICFPGAFPGA1(2)(3)FPGA()VGASTM32ARMCortex-M3STM32Cortex-M3Thumb-2STM32F10370MHz256k512k64kSRAM1.5FPGAVGAVGASTM32+FPGA+STM32FSMC51VGA2VGAOLEDVGAOLED3FPGASTM32FSMCFPGASTM32FSMC7FPGA-VGAFPGASTM3282VGAOLED2.1VGADVIVGAVideoGraphicArray64048025616320240256VGAVGA1M8006001024768VESA(VideoElectronicsStandardsAssociation)SuperVGASVGASVGAVGASVGA15DVIDigitalVisualInterface1999SiliconImageIntelDDWG(DigitalDisplayWorkingGroup)19944DDWGSiliconImagePanelLinkDVIPanelLink(TransitionMinimizedDifferentialSignalingTMDS)32DVIDVILCDVGADVIVGA9DVI3FPGASTM32FSMC3.1FPGAPLD2070PROM2070PLAPLA207080PLAGALPALGALE2COMPLDLDPLDLiveDensityPLD1984XilinxFPGA2090AlteraFPF10K100FPGACPLDEPLDFPGA1EPLDEPLDAlteraCMOSEPROMI/OGALEPLDAlteraXilinxAMDLatticeEPLD2CPLDCPLDCPLDCPLDI/OCPLD10I/OCPLDLatticeispLSIXilinx70009500AlteraMAX600070009000AMDMACH3FPGAFPGAFPGAXilinx2000300040008000VirtexEAlteraFLEX10K3.2FPGAFPGAPALGALLCALogicCellArrayCLBConfigurableLogicBlockIOBInputOutputBlockInterconnect[4]FPGA161RAMDI/O[5]I/OFPGASRAMSRAMI/OFPGASRAMFPGAEPROMSRAMFPGA22112.1FPGA(IOB)I/OFPGAI/OI/OFPGADDR2GbpsCLBCLBCLBFPGACLBCLB46RAM12ROMFPGA1/FPGAEDA2EDAHDL3HDL4FPGA56FPGA13FPGA7849FPGA3.3STM32F103FSMCSTM32ARMCortex-M3STM32Cortex-M3Thumb-2STM32F10370MHz256k512k64kSRAMSTM32OLEDFSMCFSMC(FlexibleStaticMemoryControllerSTM32256KBFlashxCxDxE[9]FSMC//STM32SRAMNORFLASHNANDFLASH14NORFlashNANDFlashSTM32FSMCNORFlashNAND/PCCardSTM32FSMCAHBCortexM3AHBFSMCFSMCFSMC1GB4256MBBANKBANK464MBBANKFSMC2NORFlash1BANKNAND/PCCard24BANKBANK14BANKBANK2BANK4NORFlashBANK14BANKBANK2FSMC_NEi(iBANKi=14)FSMC154.1FSMC16FPGA-VGA44.1OLED+VGA+FPGA+STM32FPGAVGAOLEDFPGAIntel8080STM3212.2.1VGAVGA1535HSYNCVSYNCVGARGB16RGB565FPGAR6GBSTM32VGAFPGASTM32FPGA2.2.2VGA[14-15]VGA4VSYNCHSYNCSTM32NANDFLASHVGAOLEDRAMFIFO173VGA4VGA60Hz640480133MHzFPGA11VGA961664048800310480325259616DATA640488001831060Hz60640480554.1.1OLEDM92OLED92/OLED640480VGA0.44(11mm)4:3482DC3.7V~4.5V920mWAV/CVBS/COMPONENT/VGA4.1.2FPGA-VGAFPGA-VGAXilinxXC3S50AN32M19HY57V641620ETP-74274HC08XC3S50AN16RGBVGAVGARGB16RGB565FPGAR6GBXC3S50AN632MHY57V641620ETP-77274HC08VGA-HVGA-V8FPGAIntel80809316FPGAXC3S50AN20732MHY57V641620ETP-7218274HC08VGA-HVGA-V229Intel8080231GND2GND3D15/4D14/5D13/6D12/7D11/8D10/9D9/10D8/11D7/12D6/13D5/14D4/15D3/16D2/17D1/18D0/19WE20OE21CE22A0023GND24GND25GND26+3.3V+3.3V2434.1.3FPGA-STM32Intel8080FPGAIntel80809STM32I/OFSMCFSMCNORFLASH\PSRAMOLEDNORFLASHNORFLASH6FSMCNORFLASHSTM320x60000000~0x9FFFFFFF0x60000000~0x6FFFFFFFNORFLASHSRAMFSMCNORFLASH0x600000000xffffFSMC7FSMCCLKA[25:0]D[15:0]/NE[x]x=1...4NOENWENWAITNORFSMC257FSMCNOR818Intel8080NE[X]NORA[25:0]260x60000000NEW0xffffD[15:0]NORFLASH7NADVFSMCNOR8080(8)8080FSMC-NORCSXNExWRXNWRRDXNOED[15:0]D[15:0]D\CX/A[25:0]38080/FSMC8080FSMCA0()8080D\CXA0D[15:0]A00x6xxxxxx10x6xxxxxx30x6xxxxxx5A0(D/CX)0x6xxxxxx00x6xxxxxx20x6xxxxxx4A0(D/CX)3FPGASTM32STM32FSMC8080FPGAGRAM4.2.2STM32GPIO/*******************************************************************************LCD_GPIO_Config27*FSMCLCDI/O********************************************************************************/staticvoidLCD_GPIO_Config(void){GPIO_InitTypeDefGPIO_InitStructure;/*EnabletheFSMCClock*/RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC,ENABLE);/*configlcdgpioclockbaseonFSMC*/RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD|RCC_APB2Periph_GPIOE,ENABLE);GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;GPIO_InitStr